How To Create a General Purpose Graphics Card With an FPGA

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VGA CPLD graphics card (or FPGA Graphics Card) loading a web page on a CPLD.
Homebuilt CPLD Graphics card loading DQYDJ

Recently, I finished the first working version of my VGA graphics card which I built using a 144 macrocell CPLD*. It's capable of driving 640x480 by 8 bit color resolution on most any monitor which will take a VGA input, from almost anything which has an SPI output.

I walk you through what it takes to create an FPGA graphics card with VHDL (or a CPLD, like I did) - follow along!

Video card with Programmable Logic

I wanted to talk about the project (and share information, code, and instructions to build it for yourself!). A usable product is now complete and available for you to build, program, and improve upon:

  • Hardware designed and assembled
  • Firmware for uC and CPLD written and working
  • User space drivers working (in Arduino and on Linux)
  • Framebuffer drivers working on Raspberry Pi 2 Model B

For the impatient, you can skip ahead to:

*(please ignore the 10 month gap in updates - it took some time for the motivation to come back!)

Technical Details for the CPLD Graphics Card

This version of the project has the following technical specifications:

  • 640x480 @ 60Hz Standard Mode VGA
  • 8 bit color (RGB332 or 8 Shades of Red, 8 Shades of Green, 4 Shades of Blue, 256 colors total)
  • Plugs into SPI (Serial Peripheral Interface)
    • 5V, 3.3V or 2.5V input
  • Up to 59.5 MHz SPI support (suggested, but read the note below)

As for how that breaks down in performance (Worst case assumption: the entire screen needs a refresh every time, which is highly unlikely):

  • 25 Frames Per Second minimum over SPI at 62.5 MHz worst case.

In the RPi2 driver, I have set the FPS at 25 and the SPI speed at 62.5 MHz and it luckily doesn't overwhelm any of the hardware.  Also, 25 FPS may seem low, but it's perfectly acceptable even for some games... which you can see below in the video.

You probably shouldn't enter any tournaments, though.

What Can Drive This CPLD Video Card?

Technically, anything with SPI output (or even GPIOs you will program - see my note on the Intel Edison below).

The initial release includes code for the Raspberry Pi 2 Model B with the Broadcom BCM2836 SoC.  I don't have an original Raspberry Pi with a BCM2835 SoC, but I imagine they are substantially similar and could be made to work (and in fact might work already - hopefully someone will let me know or send me one to test?).

Go Here For the Official First Release

Want a more substantive demo?  Here it is running Doom on the Pi 2:

This first release will be for the Raspberry Pi 2 Model B only.

(Editor: Since publishing this article, I successfully got the FPGA graphics card working with the Intel Edison, saturating the 25 MHz SPI link. Here's the writeup on . As far as I know, I was the first to build a standard graphics interface on the Edison.)

I also have a driver for the Odroid C1.

Feel free to write drivers yourself for other boards; the protocol is detailed in the links and it will usually take around 30 lines of code.

Acquiring/Building VGATonic

All of the collateral you need to build yourself a VGAtonic can be found on Github.  All the parts? Shop around; here is the BOM

If you have perfect soldering skills, you can probably make one for about $24 (less if you have more parts lying around).

A note on the CPLD/FPGA Graphics Card dichotomy

VGATonic is a CPLD Graphics card, mainly because of the challenge I wanted in fitting all of the logic into a constrained part. 

An FPGA Graphics card would have many more resources and on-chip resources like PLLs, so you should be able to take this project much further!

Other Engineering Projects

Feel free to subscribe, but DQYDJ is mostly a finance site.  I have a bunch of projects I've completed, however, and some of them did end up online.  Here are some notable ones:

Software, on the other hand, is all over this site.  Try our calculators and visualizations page for more.

Thank Yous

  • Hackaday Prize 2014 (for motivating my initial project)
  • Hackaday Prize 2015 (for motivating the continuation)
  • Matt Porter, Neil Greatorex, Kamal Mostafa, and notro for all of their amazing work on SPI framebuffers and deferred IO.  I was able to build upon:

And thank yous to some of the prior art and instruction:

Let us know if you build a CPLD... or an FPGA graphics card.



PK started DQYDJ in 2009 to research and discuss finance and investing and help answer financial questions. He's expanded DQYDJ to build visualizations, calculators, and interactive tools.

PK lives in New Hampshire with his wife, kids, and dog.

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